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Building an ARM bare machine application

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Building an ARM bare machine application

The following tools installed in /opt/STM/STLinux-2.4/bare/armv7/bin are used to build an ARM bare machine application:

  • arm-none-eabi-addr2line
  • arm-none-eabi-ar
  • arm-none-eabi-as
  • arm-none-eabi-c++
  • arm-none-eabi-c++filt
  • arm-none-eabi-cpp
  • arm-none-eabi-elfedit
  • arm-none-eabi-g++
  • arm-none-eabi-gcc
  • arm-none-eabi-gcov
  • arm-none-eabi-gprof
  • arm-none-eabi-ld
  • arm-none-eabi-nm
  • arm-none-eabi-objcopy
  • arm-none-eabi-objdump
  • arm-none-eabi-ranlib
  • arm-none-eabi-readelf
  • arm-none-eabi-size
  • arm-none-eabi-strings
  • arm-none-eabi-strip

For documentation on each of these tools please refer to their user manuals (installed in /opt/STM/STLinux-2.4/bare/armv7/info).

To build a simple hello, world application for a B2020-STiH415 target the use the following command:

host% arm-none-eabi-gcc hello.c -o hello.out -Wl,--defsym,__start=0x40000000,--defsym,__stack=0x60000000

where --defsym,__start=0x40000000 specifies the address where the application will be loaded and --defsym,__stack=0x60000000 specifies the address of the stack for the application. In this example the application has been allocated 512MB of RAM starting at the base of RAM.

Notes:

  • The stack grows downward from the address specified by the __stack symbol and the heap grows upward from the end of the BSS section of the application (identified by the __end__ symbol).
    -------------------- 0x40000000
    | CODE             |
    --------------------
    | RO DATA          |
    --------------------
    | DATA             |
    --------------------
    | BSS              |
    --------------------
    | Heap             |
    |                  |
    |                  |
    | Stack            |
    -------------------- 0x60000000
  • Only identity mapped virtual to physical addresses are supported.
  • Hardware initialisation is limited to only that required by the C runtime library and to ensure safe execution. This means that only the following is performed:
    1. disable all interrupts (IRQ and FIQ),
    2. turn off the MMU and caches,
    3. ensure that only core 0 is executing,
      • the other cores enter sleep mode (by executing the wfe instruction)
      • the sleeping cores can be woken up by performing the following steps:
        1. write an address to the variable __cpu_nostack_init_holding_pen_release_address
        2. raise an event (by executing the sev instruction)
    4. turn on the ARM Neon floating point co-processor.
Architecture: 

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